CompE@UIUC with a focus in FPGAs, Computer Architecture and Digital Design.
Currently on track to graduate in December 2026.
I am an Intern at ARM working on RTL performance analysis on the SoC team.
Currently a Teaching Assistant for the computer architecture course at UIUC (ECE 411)
I also used to help teach the required FPGA course at UIUC (ECE 385)
SIGARCH@UIUC is UIUC’s premier computer architecture interest group. We do workshops and paper discussions on computer architecture topics.